The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the inventors hereof, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted to be prior art against the present disclosure.
In electronic systems that execute software, firmware or microcode (hereafter collectively referred to as “software” or “instructions”), under control, e.g., of a processor, microprocessor or microcontroller (hereafter collectively referred to as a “processor”), it is frequently necessary to compare a data item to a list of data items. The number of comparisons that can be performed during each system clock cycle is limited, and decreases as the size of the items being compared increases. If all necessary comparisons cannot be performed within a single clock cycle, system performance may suffer.